Various polymers may be used in the manufacture of electronic devices, including, for instance, photoresists and organic-based dielectrics. Photoresists, for example, may be used throughout semiconductor device fabrication in photolithographic operations. A photoresist may be exposed to actinic radiation through a photomask. Where a positive-acting resist is used, exposure may cause a chemical reaction within the material resulting in a solubility increase in aqueous alkali, allowing it to be dissolved and rinsed away with developer. Where a negative-acting resist is used, cross-linking of the polymer may occur in the exposed regions while leaving unexposed regions unchanged. The unexposed regions may be subject to dissolution and rinsing by a suitable developer chemistry. Following development, a resist mask may be left behind. The design and geometry of the resist mask may depend upon the positive or negative tone of the resist; positive tone resist may match the design of the photomask, while a negative tone resist may provide a pattern that is opposite the photomask design.
Photoresists are used extensively in many applications, including the packaging of microelectronic devices and in manufacturing compound semiconductors.
In wafer level packaging, solder is applied directly to wafers that have completed the fabrication of the microelectronic devices but have not been diced into individual chips. Photoresist is used as the mask to define the placement of the solder on the wafers. After solder is deposited onto the wafer, the photoresist must be removed before the next step in the packaging process can occur. Typically in wafer level packaging, the photoresist is very thick, greater than 10 μm and sometimes as thick as 120 μm. The photoresist can be positive or negative, and can be applied either as a liquid or a dry film. In wafer level packaging, the use of thick dry film negative photoresist is common.
Due to the thickness and cross-linked nature of thick dry film negative photoresist, the removal of this material after solder deposition can be difficult. As a result of requirements for these process flows, immersion cleaning developed so that multiple wafers, typically 25 to 50 at a time, could be processed simultaneously and increase the tool throughput while still accommodating the long process time. The success with this type of processing allowed thick negative films to be successfully incorporated throughout the packaging process. However as wafer feature dimensions continue to be scaled down and the number of processes per wafer increases, the value of the wafer continues to increase. There comes a point when the best way to minimize risk of a bad result due to a process failure, is to process each wafer individually. Current immersion technology does not offer a removal solution with good cleaning characteristics, good compatibility and a process time that would meet practical throughput and cost-of-ownership targets of the industry.
In compound semiconductor processing, positive and negative spin on photoresist are commonly used. For example, for a lift off process, photoresist is applied and patterned, metal is deposited over the top of the pattern and the photoresist is removed, simultaneously removing metal on top of it. Moreover better stripping compositions that are compatible with the permanent wafer materials are needed for removal of the photoresist in a single wafer process.
Additionally, in compound semiconductor processing, patterns are formed in a layer on the substrate surface by patterning a photoresist on the surface and putting the substrate, with the patterned resist into a chamber with a plasma. The plasma can be selected to preferentially etch the open surface relative to the photoresist, thus creating the same pattern as the photoresist in the exposed layer. After the plasma treatment, photoresist as well as post etch residue, often organometallic and/or metal organic in nature, remains on the surface. Removal of the post etch residue at the same time as the remaining photoresist, while still maintaining compatibility with the permanent materials on the wafer surface would help ensure device performance.